FCBGA / Flip Chip Ball Grid Array
  • Specification

    - PKG description: 17X17mm, 473LD
    - PKG Profile : Max 1.53 mmT
    - Bump composition : Eutectic (Sn63/Pb37)
    - Bump pitch : min 150um
    - Bump height / count : 80um / 1189ea
    - Flux type for Chip Attach : Water soluble
    - PCB structure : 4 layer Build-up
    - PCB bump pad type : IT+SOP
    - Marking : Laser
    - Lead inspection : Optical
    - Pack/ship options : JEDEC Tray

Description

Flip Chip interconnection provides the ultimate in miniaturization, enables new para-digms in the area of power and ground distribution to the chip which are not feasible with other traditional packaging approaches.

Laminate or build-up organic substrate offers better electrical performance than wire-bond type BGA package especially in high frequency applications.

HANA Micron셲 Flip Chip BGA packages are available in ball counts ranging from 225 to 2401, body sizes from 15 x 15mm to 50 x 50mm and various package formats

  • Features

    - 45N/65N Low K, 32N ELK wafer tech
    - Eutectic, high Pb, Pb-free(LF) and Cu-pillar bumps
    - High performance packages up to 50mm body size with
      >2401 pins
    - Bumped wafer thinning down to 100쨉m
    - 0.50 to 1.00mm solder ball pitch
    - Low cost flip chip package in intermediate ball counts
    - Ni-Au, Ni-Pd-Au, SOP (solder-on-pad), OSP (organic solderable
      preservative) pad an immersion Tin(Sn) finish

  • Applications

    - Mobile application
    - FPGA
    - ASIC
    - CPU
    - GPU
    - IGP

FCBGA-H / Flipchip BGA H/S
  • Specification

    – Bumped wafer thinning down to 300關m
    – Green flip chip solution with Pb-free,
      Cu-column bump and halogen-free material set
    – 200mm and 300mm bumped wafers
    – Package body size 14 square ~ 50square
    – Ni-Au, Ni-Pd-Au, SOP(solder-on-pad),
      OSP(organic solder preservative),
      Ni-free SOP pad and immersion tin finish
    – Meet the reliability level : JEDEC MSL level 4 or 3
    – F/A metrology tools for rapid diagnosis and debugging,
      including TDR, CSAM, X-ray, Ion milling and SEM

Description

Flip chip package construction utilizes Sn bump ball flip chip interconnection technology instead of standard wire-bond interconnect.

The Flip-Chip BGA (FC-BGA) allows for the design of advanced packaging solutions that are ideal for current and future high-speed networking and telecommunications
For example, to maintain signal integrity, this package features low inductance, low dielectric loss and impedance

HANA Micron셲 Flip chip BGA packages are available in flip chip bump ball counts ranging from 200 to 3000 ball counts, body sizes from 14x14mm to 50x50mm and various package formats.

Flip chip assembly process allows for a minimum of 150um(min pitch) full array flip chip bump.

  • Features

    - Die thickness : 8inch 100~700關m
      12inch 100~700um
    - Bump pitch : 150um area array
    - Marking : Laser
    - Packing option : JEDEC tray
    - Moisture sensitivity level : JEDEC level 4 or 3
    - Temperature cycling : -55꼦/125 꼦, 1000cycles
    - High temperature storage : 150꼦, 1000hrs
    - Unbiased HAST : 130꼦, 85% RH, 2atm, 96hrs

  • Applications

    - CPU of computer
    - GPU of graphic card
    - LCD drive IC
    - Main controller of electrical device
    - High electrical performance device

FCFBGA / Flip chip FBGA
  • Specification

    – Minimum overall height of 1.20mm for flip chip FBGA
    – Conventional 2 and 4 layer through hole or
      laser lamination substrates
    – SOP(SAC305) or Non-SOP bump pad finish
    – Bump type : Eutectic SnPb, hi-Pb or Pb-free bumps,
      Cu column(Cu pillar)
    – 150um minimum flip chip bump pitch
    – Capillary underfill(CUF), molded underfill(MUF) available
    – 0.30mm minimum package ball size and 0.50mm ball pitch
    – Body sizes 4x4mm through 17x17mm

Description

HANA Micron is offering the Flip Chip FBGA(flip chip solution in a CSP package format).
Flip chip package construction utilize Sn bump ball flip chip interconnect technology instead of standard wire-bond interconnect.

The fcFBGA is an over molded package with solder balls.
Low inductance of flip chip bumps joint, direct signal path.
Designed for high frequency application.

HANA Micron’s Flip chip FBGA packages are available in flip chip bump ball counts ranging from 32 to 1624 ball counts.혻
Body sizes from 4x4mm to 17x17mm and various package formats.
Flip chip assembly process allows for a minimum of 150um(min pitch) full array flip chip bump.

  • Features

    - 150um bump pitch available
    - Up to 4x4mm body size available
    - 0.40 to 1.00mm ball pitch
    - Low profile 1.00mm and below possible
    - JEDEC standard compliance
    - Pb-Free, RoHS compliant & Green BOM
    - BT laminate materials(2~4 metal layers)
    - Wide range of open tool substrate available

  • Applications

    - Smart phone
    - lap top(Ultra thin notebook/Tablet PC/)
    - Portable game device
    - Power/Analog IC drive
    - Control drive IC for portable electronic device

FCFBGA CUF / Flip Chip FBGA Capillary Underfill
  • Specification

    – PKG descriptioin: 5X5mm, 36LD
    – PKG Profile : Max 0.73 mmT
    – Bump composition : Cu pillar (Cu+SnAg)
    – Bump pitch: min 100um
    – Bump height / count : 80um(50Cu+30SnAg)/ 33ea
    – Flux type for Chip Attach : Water soluble
    – PCB structure : 2 layer Laminate
    – PCB bump pad type : ENEPIG + SOP
    – Marking: Laser
    – Lead inspection: Optical
    – Pack/ship options: JEDEC Tray

Description

HanaMicron’s FCFBGA is the high performance flip chip solution and also produced on substrates in matrix strip format and the die is underfilled by capillary underfill (CUF).
That provides additional benefits such as improved board real estate use, by allowing closer spacing between passives and the flip chip die,

better warpage control for thin core substrates and improved solder joint reliability for passives. HanaMicron continues to pursue new package solutions.

  • Features

    - Min 100um bump pitch w Cu pillar+SnAg
    - High density wide strip available
    - 5.0 x 5.0 mm package size available
    - 0.50mm Ball Pitch / 0.25mm Solder Ball available
    - 2.5 x 2.5 mm small die available
    - Pb-free and Green materials sets available

  • Applications

    - Mobile application
    - FPGA
    - ASIC
    - CPU
    - GPU
    - IGP

FCFBGA MUF / FCFBGA Molded Underfill
  • Specification

    – PKG description: 14X12mm, 170LD
    – PKG Profile : Max 1.2 mmT
    – Bump composition : Cu pillar (Cu + SnAg)
    – Bump pitch: min 130um
    – Bump height / count : 50um(30Cu + 20SnAg) / 184ea
    – Flux type for Chip Attach : Water soluble
    – PCB structure : 2 layer Laminate
    – PCB bump pad type : ENEPIG + SOP
    – Marking: Laser
    – Lead inspection: Optical
    – Pack/ship options: JEDEC Tray

Description

HANA Micron’s Flip chip needs to develop low cost PKG. Molded Underfill (MUF) PKG is so useful to reduce assembly process. Conventional flip chip CSP, after chip attach(CA), used underfill process for filling bump gap between die and substrate and then over mold the package using EMC. MUF PKG consolidated underfill and over mold process by directly filling bump gap with mold compound. Also, it can apply high density matrix for small die.
This technology can reduce process step and save assembly cost.

  • Features

    - Min 130um bump pitch w Cu pillar+SnAg
    - High density wide strip available
    - 7.5 x 8.5mm die size available
    - 50um bump stand off available
    - Vacuum Mold system available
    - Pb-free and Green materials sets available

  • Applications

    - Mobile application
    - GPU
    - ASIC
    - Memory